The HP9810, HP9820 and HP9830 obvious have very different display 
systems. The HP9810 has 3 rows of 15 digits, the HP9820 has a 16 character 
dot-matrix display and the HP9830 has a 32 character dot-matrix display. 
However, in all 3 cases, the display is controlled by the 16 bits of the 
I/O register. The system firmware loads a value into the this register 
and causes the I/O control system to assert {\bf DispStb/}. The contents 
of the I/O register select a particular display element and also 
determine what is displayed in that element.

In the case of the HP9810, an element is one of the 45 digits., and the
segments are individually controlled by bits in the I/O register. In the
HP9820 it's one of the 80 columns that make up the 16 characters, the
LEDs in that column are again individually controllable. The HP9830
display has a hardware character generator, the contents of the I/O
register select a pair of characters 16 positions apart in the display and
determine the characters to be displayed in those 2 positions. 

The 3 display systems will now be described individually.

\section{HP9810 display}
There are in fact 2 versions of the HP9810 {\bf Display PCB}. The 
earlier one is fitted with 45 separate 7-segment display devices, the 
later one has nine 5-digit display modules, similar to those used in the 
`classic series' handheld calculators. The PCBs are electrically very 
similar, the following description strictly applies to the later, more 
common, version, but it will be of use in repairing the earlier one too.

The bits of the I/O register are used in the following way : 
\begin{description}
\item[DO(0)\ldots DO(3)] : Select a particular digit in a display row 
(binary encoded)
\item[DO(4)\ldots DO(6)] : Select one of the 3 rows (1-of-n encoded)
\item[DO(70), SO(0)\ldots SO(3), CO(0)\ldots CO(2)] : These 8 bits give 
the segment pattern for the selected digit.
\end{description}
The display PCB has a separate anode driver circuit for each display row 
and a common cathode driver circuit for all 3 rows. 

There are 24 essentially identical anode driver circuits, I shall 
describe the one for the `a' segment of the X register display, the 
others work in the same way.

The {\bf CO(1)} bit from the I/O register is buffered by U7c, giving {\bf
Segment(a)}. {\bf DO(4)}, which is low to select the X register display
row, is inverted by U15a, giving the {\bf XSel} signal. Therefore, the
output of U11b is low when the `a' segment of the X register is to be
turned on.  This then saturates the associated PNP driver transistor,
applying 5V to the appropriate display anode pin through a 25.5$\Omega$
resistor. 

The cathode driver is based around a pair of decoder ICs U12 and U13. 
{\bf DO(0)}\ldots{\bf DO(3)} are buffered, e.g. by U4a, and fed to the 
inputs of these decoders. U12 is enabled by U10a when {\bf Digit(3)} is 
low, while U13 is enabled by U10b and U13f when {\bf Digit(3)} is high. 
The selected output of the selected decoder goes low, and pulls the 
appropriate  cathode pin of the display low via an PNP emitter follower 
such as U6d.

To enable either decoder (and thus any of the cathode lines), {\bf 
DispEn/} must be low. This comes from the display protection circuit 
based around the monostable U4. For {\bf DispEn/} to be low, {\bf 
DispStb} from the {\bf I/O Interface} PCB must be low, but U4 must not 
have timed out.{\bf DispStb} is set low by the {\bf I/O Interface} to 
display a particular digit but if, due to some fault, it is stuck low, U4 
will time out, disable the cathode drivers and protect the displays. 

\section{HP9820 display}
The HP9820 display appears to the machine as an 80-column, 7-row matrix 
of LEDs. The bits of the I/O register control it in the following way : 
\begin{description}
\item[DO(0)\ldots DO(6)] : The pattern of LEDs in the selected column
\item[DO7,SO(0)\ldots SO(3), CO(0), CO(1)] : Select a particular column. 
This is not a simple binary code, instead {\bf SO(3)}, {\bf CO(0)} and 
{\bf CO(1)} select a group of 10 columns and {\bf DO(7)} and {\bf 
SO(0)}\ldots{\bf SO(2)} select a particular column within that group.
\end{description}

An 80-column, 7-row LED matrix would appear to need 80 cathode 
(column) drivers and 7 anode (row) drivers, for a total of 87 circuits. 
However, electrically, the display is wired as 20-column 28-row matrix 
requiring 20 cathode drivers and 28 anode drivers. The anode drivers are 
further simplified by considering them as 4 groups of 7.

A particular group of anode drivers is selected by the decoder U6. For 
any of the outputs 0\ldots3 to be asserted, both the C input ({\bf 
DispStb/}) and the D input (output of the monostable U5) must be low. This 
is essentially the same display protection circuit as I described for the 
HP9810 display. U6, therefore, decodes the {\bf CO(0)} and {\bf CO(1)} 
signals, enabling a particular {\bf RowSel} signal via one of 4 PNP 
transistors.

Each {\bf RowSel} signal applies 5V power to the emitters of a further 7 
PNP transistors. These are individually controlled by the low 7 bits of 
the I/O register via inverters such as U13f. When a particular bit of the 
I/O register is set, the output of the inverter goes low, saturating the 
transistor. The collectors of these 28 PNP transistors feed the display 
matrix anode connections via 16.5$\Omega$ resistors.

The cathode driver circuit consists of a pair of 1-of-10 decoder ICs, 
U11 and U8. When {\bf SO(3)} is low, the outputs U7c and U7d are forced 
high, so none of U8's outputs are selected. U7a and U7b are enabled, so 
4 bits of the I/O register are passed to U11. Similarly when {\bf SO(3)} 
is high, the outputs of U7a and U7b are force high, disabling U11, while 
U8 decodes the same 4 bits from the I/O register. The 20 outputs of these 
decoders are buffered by PNP emitter followers such as U1d, and connected 
to the cathode lines of the display matrix. 

\section{HP9830 display}
The HP9830 display system is considerably more complicated because the 
character patters are generated in hardware, rather than by the machine's 
firmware. The 16 bits of the I/O register are used in the following way : 
\begin{description}
\item[DO(0)\ldots DO(3)] : Select a pair of display locations, 16 
characters apart, that is 0 and 16, 1 and 17\ldots 15 and 31.
\item[DO(4)\ldots DO(7), SO(0), SO(1)] : The character code to be 
displayed in the second selected location.
\item[SO(2), SO(3), CO(0)\ldots CO(3)] : The character code to be 
displayed in the first selected location.
\end{description}
The display system consists of 2 PCBs. The {\bf Display} PCB contains 
the LED displays themselves and the anode/cathode drivers. The {\bf 
Display Driver} PCB contains the character generator circuits. I shall 
begin with the latter.

To start a display scan, {\bf DispStb/} pulses low. This sets monostable 
U5a, and since {\bf Char(0)} is low, U5b is triggers, asserting {\bf 
DispEn/} ({\bf Char(0)} is simply DO(0), buffered by U18b on the {\bf 
Display} PCB). {\bf DispStb/} also clears the scan counter U12, which is 
used to select individual columns in the a particular display character. 
This is decoded by U7, the outputs of which select a column of the 
character generator ROM U1.

The asymmetric clock oscillator built from the monostables U6a and U6b 
now runs, clocking U12. Thus the counter scans through the columns of the 
character. The AND-OR-invert data selectors such as U14b are controlled 
by the clock signal. When {\bf Clk} is high, the character code from the 
first selected position is gated to the inputs of the character generator 
U1. The outputs of this ROM are fed into the latch U9 and become the {\bf 
LRow} signals to the the {\bf Display} PCB. When {\bf Clk} goes low. that 
pattern is latched in U9, and the character code for the second position 
is applied to character generator inputs. The AND gates such as U11c are 
enabled, so the character pattern appears on the {\bf Row} lines Due to 
the asymmetry of the clock, the actual output consists of a short period 
while U9 is updated, then a much longer period where the {\bf Row} and 
{\bf LRow} signals are stable, giving the column patterns for 
the current column of the 2 characters. The column counter U12 is then 
incremented, there is the short update period again, followed by a stable 
period when the next column of the 2 characters is output. And the end of 
the character scan, output 6 of U7 goes low, disabling the clock generator 
until U12 is reset by the next {\bf DispStb} signal.

A similar trick to the HP9820 display is used to reduced the number of
driver circuits required. Rather than a 7-row, 160-column matrix, the
display is wired as a 28-row, 40 column one. The inputs to the display 
driver circuitry on the {\bf Display} PCB therefore consist of : 
\begin{description}
\item[3 bits, DO(0)\ldots DO(2)] to select 1 of 8 sets of 4 characters
\item[DO(3)] to select a particular pair of character in that set, and to 
gate the Row and LRow lines to the appropriate anode drivers
\item[3 bits, Col(0)\ldots Col(2)] to select a particular column within 
the characters.
\item[2 sets of 7 signals (Row and LRow)] giving the patterns in the 2 
selected columns
\item[DispEn/] : An overall enable signal.
\end{description}

The {\bf DO(3)} bit is buffered by U18d and the inverted/buffered by the 
4 gates in U22 providing the anode driver enable signals. The {\bf 
LeftEn} signals are high when the characters to be displayed are in the 
first 8 positions of each half of the display, the {\bf RightEn} signals 
are high when they are in the second 8 positions. These signals enable 
NAND gates in the row driver circuitry. For example, U19d gates {\bf 
LRow(0)} to the base of U1a when {\bf LeftEnB} is high, thus controlling 
the anode line {\bf DispRowA(1)}.

The low 3 bits of the I/O register are buffered (for example by U18b) and 
become the {\bf Char} lines. The {\bf Col} lines are decoded by U35, 
which mimics the operation of U7 on the {\bf Display Driver} PCB. 
Together these signals control 5 further decoders, each selecting 1 of 8 
display columns. U36, for example, is enabled whenever the leftmost 
column of a character is being displayed, the {\bf Char} signals 
determine which display location is used. The outputs of these decoders 
are buffered and connected to the display cathode lines. The outputs of 
U36 enable the leftmost columns of the display characters, those of U37 
the second-from-left and so on up to U40 which  selects the rightmost 
columns of the characters.

